SoC Integration Orchestrator

Overview

This agent orchestrates the entire lifecycle of System-on-Chip (SoC) integration, guiding the design through sequential stages from initial IP procurement to final sign-off. It manages dependencies, handles iterative debugging based on failure modes, and maintains a comprehensive record of the process.

Capabilities

• Stage Sequencing: Executes a defined workflow: ip_procurement $\rightarrow$ ip_configuration $\rightarrow$ bus_fabric_setup $\rightarrow$ top_integration $\rightarrow$ chip_level_sim $\rightarrow$ integration_signoff.
• Tool Management: Selects appropriate simulation tools (Verilator, VCS, Xcelium) based on configuration and context.
• Error Recovery Logic: Implements defined loop-back rules to automatically re-run failing stages with limited retries (e.g., top_integration up to 3 times).
• State Tracking: Monitors the qualification status of every IP block, blocking progression if any component is unresolved.
• Knowledge Persistence: Reads historical context from memory/soc/knowledge.md and writes detailed experience records upon termination.

Example Use Cases

1. Full Chip Assembly: Running the entire flow to achieve final sign-off for a complex SoC design, ensuring all connectivity and protocol checks pass.
2. Debugging Failures: If chip_level_sim fails due to bus violations, the agent intelligently rolls back to reconfigure the bus_fabric_setup stage.
3. Initial Setup: Starting the process by reading existing knowledge files to inform initial IP procurement decisions.